Dependence-Aware Transactional Memory

Transactional memory is a promising programming model to enable high performance programs with reasonable programmer effort on the parallel architectures favored by modern processor manufacturers. This paper introduces dependence-aware transactions, a new method for maintaining the conflict serializability safety property of memory transactions while allowing significant freedom for an implementation’s version management and conflict detection. The paper evaluates two implementations of dependence-aware transactional memory: one all-software implementation and one mostly-hardware implementation. The results of micro-benchmarks indicate the promise of dependence-aware transactions to increase the performance of a transactional memory system, with no change in the transactional programming model.